re PR middle-end/54400 (recognize vector reductions)

re PR middle-end/54400 (recognize vector reductions)

2012-10-08  Marc Glisse  <marc.glisse@inria.fr>

gcc/
	PR target/54400
	* config/i386/i386.md (type attribute): Add sseadd1.
	(unit attribute): Add support for sseadd1.
	(memory attribute): Likewise.
	* config/i386/athlon.md: Likewise.
	* config/i386/core2.md: Likewise.
	* config/i386/atom.md: Likewise.
	* config/i386/ppro.md: Likewise.
	* config/i386/bdver1.md: Likewise.
	* config/i386/sse.md (sse3_h<plusminus_insn>v2df3): split into...
	(sse3_haddv2df3): ... expander.
	(*sse3_haddv2df3): ... define_insn. Accept permuted operands.
	(sse3_hsubv2df3): ... define_insn.
	(*sse3_haddv2df3_low): New define_insn.
	(*sse3_hsubv2df3_low): New define_insn.

gcc/testsuite/
	PR target/54400
	* gcc.target/i386/pr54400.c: New testcase.

From-SVN: r192223