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ARM: dts: meson8b: ec100: enable the Ethernet PHY interrupt
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Fri, 18 Jan 2019 23:43:37 +0000 (00:43 +0100)
committerKevin Hilman <khilman@baylibre.com>
Mon, 11 Feb 2019 20:52:26 +0000 (12:52 -0800)
commitb7d10841e5d7003bb8bc57c122494b4fb47836c0
treea43129b91e29e4294509cc8268227cbd99d4c0b8tree | snapshot
parente7e871b50f80145d37d13e8fbdc73a7dd52c4d88commit | diff
ARM: dts: meson8b: ec100: enable the Ethernet PHY interrupt

The INTR32 pin of the IP101GR Ethernet PHY is routed to the GPIOH_3 pad
on the SoC.
Enable the interrupt function of the PHY's INTR32 pin to switch it from
it's default "receive error" mode to "interrupt pin" mode.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/meson8b-ec100.dts diff | blob | blame | history
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