aarch64-simd-builtins.def: Separate sq<r>dmulh_lane entries into lane and laneq entries.

aarch64-simd-builtins.def: Separate sq<r>dmulh_lane entries into lane and laneq entries.

2013-01-25  Tejas Belagod  <tejas.belagod@arm.com>

        * config/aarch64/aarch64-simd-builtins.def: Separate sq<r>dmulh_lane
        entries into lane and laneq entries.
        * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh_lane<mode>): Remove
        AdvSIMD scalar modes.
        (aarch64_sq<r>dmulh_laneq<mode>): New.
        (aarch64_sq<r>dmulh_lane<mode>): New RTL pattern for Scalar AdvSIMD
        modes.
        * config/aarch64/arm_neon.h: Fix all the vq<r>dmulh_lane* intrinsics'
        builtin implementations to relfect changes in RTL in aarch64-simd.md.
        * config/aarch64/iterators.md (VCOND): New.
        (VCONQ): New.

From-SVN: r195467