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(parent: 46967b1) | patch
target/openrisc: fix icount handling for timer instructions
authorPavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
Mon, 29 Mar 2021 07:42:41 +0000 (10:42 +0300)
committerPaolo Bonzini <pbonzini@redhat.com>
Thu, 1 Apr 2021 08:37:20 +0000 (10:37 +0200)
commitb9e40bac9c7a9f7301e190aa597e84f95657b5b7
tree215a52ac047cd7b874fcbb0e8010198b40f0e78dtree
parent46967b1a43dead33fa0c4afecd91b456693d1c4fcommit | diff
target/openrisc: fix icount handling for timer instructions

This patch adds icount handling to mfspr/mtspr instructions
that may deal with hardware timers.

Signed-off-by: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru>
Message-Id: <161700376169.1135890.8707223959310729949.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Stafford Horne <shorne@gmail.com>
target/openrisc/translate.c diff | blob | blame | history
Mirror of https://git.qemu.org/git/qemu.git