]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv: rvv: Modify minimum VLEN according to enabled vector extensions
authorMax Chou <max.chou@sifive.com>
Tue, 23 Sep 2025 09:07:29 +0000 (17:07 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 3 Oct 2025 03:15:14 +0000 (13:15 +1000)
commitbe50ff3a73859ebbbdc0e6f704793062b1743d93
tree8feb101397a7cf570865c4d2fbac247b176dac01
parentae4a37f57818e47e212272821a5a86ad54620eb8
target/riscv: rvv: Modify minimum VLEN according to enabled vector extensions

According to the RISC-V unprivileged specification, the VLEN should be greater
or equal to the ELEN. This commit modifies the minimum VLEN based on the vector
extensions and introduces a check rule for VLEN and ELEN.

  Extension     Minimum VLEN
* V                      128
* Zve64[d|f|x]            64
* Zve32[f|x]              32

Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250923090729.1887406-3-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/tcg/tcg-cpu.c