]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv: Restrict SoftMMU mmu_index() to TCG
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Tue, 1 Apr 2025 08:09:29 +0000 (10:09 +0200)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 23 Apr 2025 22:04:57 +0000 (15:04 -0700)
commitbf8dc33bbca3d84251d40bd81fa1d832b3171ffa
tree0417344a1c392193e2201bcfa669d28766702ff2
parent853f9378a325dbeec78afe3478dea277be369a3e
target/riscv: Restrict SoftMMU mmu_index() to TCG

Move riscv_cpu_mmu_index() to the TCG-specific file,
convert CPUClass::mmu_index() to TCGCPUOps::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-17-philmd@linaro.org>
target/riscv/cpu.c
target/riscv/tcg/tcg-cpu.c