]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Fix the test case bug-3.c failure
authorPan Li <pan2.li@intel.com>
Mon, 3 Mar 2025 06:51:21 +0000 (14:51 +0800)
committerPan Li <pan2.li@intel.com>
Tue, 4 Mar 2025 01:38:59 +0000 (09:38 +0800)
commitbfb9276f344cbc6794379d61d0279dfc3a7441b3
treec6baaa4f175093eae6e1ed951192e3346456a72a
parent491c0b8071323295471648a438eb4c216d15735c
RISC-V: Fix the test case bug-3.c failure

The bug-3.c would like to check the slli a[0-9]+, a[0-9]+, 33 for the
big poly int handling.  But the underlying insn may change to slli 1
+ slli 32 with sorts of optimization.  Thus, update the asm check to
function body check with above slli 1 + slli 32 series.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/bug-3.c: Update asm check to
function body check.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c