aarch64: Use VNx16BI for non-widening integer svcmp*

aarch64: Use VNx16BI for non-widening integer svcmp*

This patch continues the work of making ACLE intrinsics use VNx16BI
for svbool_t results.  It deals with the non-widening integer forms
of svcmp*.  The handling of the PTEST patterns is similar to that
for the earlier svwhile* patch.

Unfortunately, on its own, this triggers a failure in the
pred_clobber_*.c tests.  The problem is that, after the patch,
we have a comparison instruction followed by a move into p0.
Combine combines the instructions together, so that the destination
of the comparison is the hard register p0 rather than a pseudo.
This defeats IRA's make_early_clobber_and_input_conflicts, which
requires the source and destination to be pseudo registers.

Before the patch, there was a subreg move between the comparison
and the move into p0, so it was that subreg move that ended up
with a hard register destination.

Arguably the fix for PR87600 should be extended to destination
registers as well as source registers, but in the meantime,
the patch just disables combine for these tests.  The tests are
really testing the constraints and register allocation.

gcc/
	* config/aarch64/aarch64-sve.md (@aarch64_pred_cmp<cmp_op><mode>_acle)
	(*aarch64_pred_cmp<cmp_op><mode>_acle, *cmp<cmp_op><mode>_acle_cc)
	(*cmp<cmp_op><mode>_acle_and): New patterns that yield VNx16BI
	results for all element types.
	* config/aarch64/aarch64-sve-builtins-base.cc
	(svcmp_impl::expand): Use them.
	(svcmp_wide_impl::expand): Likewise when implementing an svcmp_wide
	against an in-range constant.

gcc/testsuite/
	* gcc.target/aarch64/sve/pred_clobber_1.c: Disable combine.
	* gcc.target/aarch64/sve/pred_clobber_2.c: Likewise.
	* gcc.target/aarch64/sve/pred_clobber_3.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpeq_2.c: Add more cases.
	* gcc.target/aarch64/sve/acle/general/cmpeq_4.c: New test.
	* gcc.target/aarch64/sve/acle/general/cmpge_1.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpge_2.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpge_3.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpge_4.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpgt_1.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpgt_2.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpgt_3.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpgt_4.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmple_1.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmple_2.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmple_3.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmple_4.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmplt_1.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmplt_2.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmplt_3.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmplt_4.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpne_1.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/cmpne_2.c: Likewise.