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target/riscv: Create settable CPU properties
authorAlistair Francis <Alistair.Francis@wdc.com>
Sat, 20 Apr 2019 02:24:01 +0000 (02:24 +0000)
committerPalmer Dabbelt <palmer@sifive.com>
Fri, 24 May 2019 19:09:23 +0000 (12:09 -0700)
commitc4e95030ba3532d13aa4e6f0738326f6f2d0c2bf
tree0613255fefe99ec095d0a91adffc7bbe6a420a8ftree | snapshot
parentceb2ffd56e3ec7caa8afc94b78257bac99cd738bcommit | diff
target/riscv: Create settable CPU properties

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
target/riscv/cpu.c diff | blob | blame | history
target/riscv/cpu.h diff | blob | blame | history
Mirror of https://git.qemu.org/git/qemu.git