]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/intc/aspeed: Refactor INTC to support separate input and output pin indices
authorJamin Lin <jamin_lin@aspeedtech.com>
Fri, 7 Mar 2025 03:59:22 +0000 (11:59 +0800)
committerCédric Le Goater <clg@redhat.com>
Sun, 9 Mar 2025 13:36:53 +0000 (14:36 +0100)
commitc6c5e63d46add459732d8d8d3b84bd5d26dff0ad
treed28fb11f71cca713fec318dc9f16eb8efde15979
parent35c909cd80d4095690bb1c98c263b01d9617de65
hw/intc/aspeed: Refactor INTC to support separate input and output pin indices

Refactors the INTC to distinguish between input and output pin indices,
improving interrupt handling clarity and accuracy.

Updated the functions to handle both input and output pin indices.
Added detailed logging for input and output pin indices in trace events.

These changes ensure that the INTC controller can handle multiple input and
output pins, improving support for the AST2700 A1.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250307035945.3698802-14-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
hw/intc/aspeed_intc.c
hw/intc/trace-events