]> git.ipfire.org Git - thirdparty/qemu.git/commit
target-xtensa: fix big-endian BBS/BBC implementation
authorMax Filippov <jcmvbkbc@gmail.com>
Tue, 17 Jul 2012 19:45:23 +0000 (23:45 +0400)
committerMichael Roth <mdroth@linux.vnet.ibm.com>
Wed, 5 Sep 2012 15:38:39 +0000 (10:38 -0500)
commitc7580c103434c8b96c5a2cd54aaa9a092bb638a7
tree3751c8a5a0626c9e8ba82a96b3f048fde6a0d56a
parenta8cd6f7ddfb9a8514170d79665669be8538d2f96
target-xtensa: fix big-endian BBS/BBC implementation

Quote from ISA, 2.1:

For most Xtensa instructions, bit numbering is irrelevant; only the BBC
and BBS instructions assign bit numbers to values on which the processor
operates. The BBC/BBS instructions use big-endian bit ordering (0 is the
most-significant bit) on a big-endian processor configuration.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
(cherry picked from commit 7ff7563fc1c3c57914aafec1753219604346fe18)

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
target-xtensa/translate.c