]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv: Add zicfiss extension
authorDeepak Gupta <debug@rivosinc.com>
Tue, 8 Oct 2024 22:50:00 +0000 (15:50 -0700)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 30 Oct 2024 01:22:08 +0000 (11:22 +1000)
commitcf064a671a67379c80e4a50a020cbe163f9875c9
tree6fff1bcffb297e95995972838df1cabb0162b3f6
parentff81343e7430fe21f9e7e6132f5627a831e3557b
target/riscv: Add zicfiss extension

zicfiss [1] riscv cpu extension enables backward control flow integrity.

This patch sets up space for zicfiss extension in cpuconfig. And imple-
ments dependency on A, zicsr, zimop and zcmop extensions.

[1] - https://github.com/riscv/riscv-cfi

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Co-developed-by: Jim Shu <jim.shu@sifive.com>
Co-developed-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241008225010.1861630-11-debug@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu_cfg.h
target/riscv/tcg/tcg-cpu.c