RISC-V: Relax "fmv.[sdq]" requirements

RISC-V: Relax "fmv.[sdq]" requirements

This commit relaxes requirements to "fmv.s" instructions from 'F' to ('F'
or 'Zfinx').  The same applies to "fmv.d" and "fmv.q".  Note that 'Zhinx'
extension already contains "fmv.h" instruction (as well as 'Zfh').

gas/ChangeLog:

	* testsuite/gas/riscv/zfinx.s: Add "fmv.s" instruction.
	* testsuite/gas/riscv/zfinx.d: Likewise.
	* testsuite/gas/riscv/zdinx.s: Add "fmv.d" instruction.
	* testsuite/gas/riscv/zdinx.d: Likewise.
	* testsuite/gas/riscv/zqinx.d: Add "fmv.q" instruction.
	* testsuite/gas/riscv/zqinx.s: Likewise.

opcodes/ChangeLog:

	* riscv-opc.c (riscv_opcodes): Relax requirements to "fmv.[sdq]"
	instructions to support those in 'Zfinx'/'Zdinx'/'Zqinx'.