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(parent: 91a2cd6) | patch
drm/i915/alpm: Write PR_ALPM_CTL register
authorJouni Högander <jouni.hogander@intel.com>
Mon, 26 May 2025 12:05:05 +0000 (15:05 +0300)
committerJouni Högander <jouni.hogander@intel.com>
Thu, 29 May 2025 05:13:40 +0000 (08:13 +0300)
commitd6a8336c5f06b4fc065963cfcf1ff4fe52640979
treeefe15883395f889167e60c018c934c1130aa2e22tree
parent91a2cd6236f394a1abf566db6fdee2e6884b2182commit | diff
drm/i915/alpm: Write PR_ALPM_CTL register

PR_ALPM_CTL register contains configurations related to Adaptive sync
sdp. Configure these if Adaptive Sync SDP is supported.

v2: avoid using hardcoded indices

Bspec: 71014
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://lore.kernel.org/r/20250526120512.1702815-6-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_alpm.c diff | blob | blame | history
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