]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Fix asm checks regression due to recent middle-end change
authorPan Li <pan2.li@intel.com>
Wed, 17 Jan 2024 08:56:56 +0000 (16:56 +0800)
committerPan Li <pan2.li@intel.com>
Wed, 17 Jan 2024 09:02:50 +0000 (17:02 +0800)
commitde4c9a27ba51e409e9d9e2a2827da53b1c979b09
tree88f75bd45840e1618f99436404b789cc139693c1
parent3359942417b02de88ae84d50aac232ac01ff9e15
RISC-V: Fix asm checks regression due to recent middle-end change

The recent middle-end change result in some asm check failures.
This patch would like to fix the asm check by adjust the times.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/shift-1.c: Fix asm check
count.
* gcc.target/riscv/rvv/autovec/vls/shift-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/shift-3.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-1.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-2.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/shift-3.c