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RISC-V: Fix VLS floating-point operations predicate
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Sat, 9 Sep 2023 04:30:26 +0000 (12:30 +0800)
committerPan Li <pan2.li@intel.com>
Sat, 9 Sep 2023 04:32:49 +0000 (12:32 +0800)
commitdf9a25384e6c484643b48b59b4e6e07504889b61
treed7c62fa1e2c8f72ac062fff097f9d08b2ba084a2tree
parent7547f65f60c0bbf8de704c569c92c7a0e31a6175commit | diff
RISC-V: Fix VLS floating-point operations predicate

VLS vfadd should depend on ZVFH instead of ZVFHMIN.
Obvious fix and committed.

gcc/ChangeLog:

* config/riscv/vector-iterators.md: Fix floating-point operations predicate.
gcc/config/riscv/vector-iterators.md diff | blob | blame | history
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