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(parent: 55d7925) | patch
RISC-V: Unbreak bootstrap.
authorRobin Dapp <rdapp@ventanamicro.com>
Tue, 21 Jan 2025 17:07:41 +0000 (18:07 +0100)
committerRobin Dapp <rdapp@ventanamicro.com>
Tue, 21 Jan 2025 18:30:55 +0000 (19:30 +0100)
commite324619281239bb513840600436b735dfbd32416
tree858dbc45d6289253d806305b53d52d8dd127c133tree
parent55d792542d21311e415daee333e2786ac5f150a7commit | diff
RISC-V: Unbreak bootstrap.

This fixes a wrong format specifier and an unused variable which should
re-enable bootstrap.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_file_end): Fix format string.
(riscv_lshift_subword): Mark MODE as unused.
gcc/config/riscv/riscv.cc diff | blob | blame | history
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