MIPS: Add CACHE instruction for mips16e2

MIPS: Add CACHE instruction for mips16e2

This patch adds CACHE instruction from mips16e2
with corresponding tests.

gcc/ChangeLog:

	* config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
	address register to M16_REGS for MIPS16.
	(BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
	(AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
	(AVAIL_NON_MIPS16 (cache..)): Update to
	AVAIL_MIPS16E2_OR_NON_MIPS16.
	* config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
	* config/mips/mips.md (mips_cache): Mark as extended MIPS16.

gcc/testsuite/ChangeLog:

	* gcc.target/mips/mips16e2-cache.c: New tests for mips16e2.