]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv/kvm.c: Fix the hart bit setting of AIA
authorYong-Xuan Wang <yongxuan.wang@sifive.com>
Wed, 15 May 2024 09:11:28 +0000 (17:11 +0800)
committerMichael Tokarev <mjt@tls.msk.ru>
Wed, 5 Jun 2024 10:06:26 +0000 (13:06 +0300)
commite532fdb0eb2e2ddbbdb7d42ed99211bd345c2515
treec36079207125c04f6cc0cfa0d2fc55ef2eeaf6ed
parentfb1be88084b69e53bcd6c12534113e68dd98d39e
target/riscv/kvm.c: Fix the hart bit setting of AIA

In AIA spec, each hart (or each hart within a group) has a unique hart
number to locate the memory pages of interrupt files in the address
space. The number of bits required to represent any hart number is equal
to ceil(log2(hmax + 1)), where hmax is the largest hart number among
groups.

However, if the largest hart number among groups is a power of 2, QEMU
will pass an inaccurate hart-index-bit setting to Linux. For example, when
the guest OS has 4 harts, only ceil(log2(3 + 1)) = 2 bits are sufficient
to represent 4 harts, but we passes 3 to Linux. The code needs to be
updated to ensure accurate hart-index-bit settings.

Additionally, a Linux patch[1] is necessary to correctly recover the hart
index when the guest OS has only 1 hart, where the hart-index-bit is 0.

[1] https://lore.kernel.org/lkml/20240415064905.25184-1-yongxuan.wang@sifive.com/t/

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Message-ID: <20240515091129.28116-1-yongxuan.wang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit 190b867f28cb5781f3cd01a3deb371e4211595b1)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target/riscv/kvm/kvm-cpu.c