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target/arm: Fix 128-bit element ZIP, UZP, TRN
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 4 Jul 2025 14:19:26 +0000 (08:19 -0600)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 4 Jul 2025 14:52:21 +0000 (15:52 +0100)
commite6ffd009c7710a8cc98094897fa0af609c114683
tree05e21237f8890833dec0d63d0973a073c13c3731tree | snapshot
parentb4b2e070f41dd8774a70c6186141678558d79a38commit | diff
target/arm: Fix 128-bit element ZIP, UZP, TRN

We missed the instructions UDEF when the vector size is too small.
We missed marking the instructions non-streaming with SME.

Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250704142112.1018902-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/tcg/translate-sve.c diff | blob | blame | history
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