]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/arm: take HSTR traps of cp15 accesses to EL2, not EL1
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 2 Apr 2024 08:54:41 +0000 (09:54 +0100)
committerMichael Tokarev <mjt@tls.msk.ru>
Tue, 2 Apr 2024 16:48:17 +0000 (19:48 +0300)
commite961fa43e94bf83e2dd4a2ed132c1c40455afdc3
tree83bc1cb5d0b1dc31e2c14795e06a782dc2d8338b
parent2702763548950689b4eccb0e040b56948da8bf4f
target/arm: take HSTR traps of cp15 accesses to EL2, not EL1

The HSTR_EL2 register allows the hypervisor to trap AArch32 EL1 and
EL0 accesses to cp15 registers.  We incorrectly implemented this so
they trap to EL1 when we detect the need for a HSTR trap at code
generation time.  (The check in access_check_cp_reg() which we do at
runtime to catch traps from EL0 is correctly routing them to EL2.)

Use the correct target EL when generating the code to take the trap.

Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2226
Fixes: 049edada5e93df ("target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240325133116.2075362-1-peter.maydell@linaro.org
(cherry picked from commit fbe5ac5671a9cfcc7f4aee9a5fac7720eea08876)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target/arm/tcg/translate.c