]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Add vxor.vx C API tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Fri, 3 Feb 2023 07:04:49 +0000 (15:04 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Fri, 10 Feb 2023 11:27:02 +0000 (19:27 +0800)
commite9d5e4ac35753b0adabed4c18c5e0f417f8827e5
tree822030d694889bedd8e95009cd849a0058875396
parent1b0bd520f5ab03807c0be297d2d210bed2e44cc7
RISC-V: Add vxor.vx C API tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vxor_vx_m_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_m_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_m_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_m_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_m_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_m_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tumu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tumu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tumu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tumu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tumu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vx_tumu_rv64-3.c: New test.
36 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_m_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_m_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_m_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_m_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_m_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_m_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tumu_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tumu_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tumu_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tumu_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tumu_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vx_tumu_rv64-3.c [new file with mode: 0644]