]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization
authorPan Li <pan2.li@intel.com>
Mon, 15 May 2023 08:18:03 +0000 (16:18 +0800)
committerPan Li <pan2.li@intel.com>
Mon, 15 May 2023 08:43:35 +0000 (16:43 +0800)
commite9ea407c474b52722cb135f3f6b265ef01aede04
tree6fefc28b34d75c0d058705fcc9e84d94a86e0685
parent7db541ce448c2776971be63c957dcc887bd09bf8
RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization

This patch is optimizing the AVL for VLS auto-vectorzation.

Given below sample code:

typedef int8_t vnx2qi __attribute__ ((vector_size (2)));

__attribute__ ((noipa)) void
f_vnx2qi (int8_t a, int8_t b, int8_t *out)
{
  vnx2qi v = {a, b};
  *(vnx2qi *) out = v;
}

Before this patch:
f_vnx2qi:
        vsetvli a5,zero,e8,mf8,ta,ma
        vmv.v.x v1,a0
        vslide1down.vx  v1,v1,a1
        vse8.v  v1,0(a2)
        ret

After this patch:
f_vnx2qi:
        vsetivli        zero,2,e8,mf8,ta,ma
        vmv.v.x v1,a0
        vslide1down.vx  v1,v1,a1
        vse8.v  v1,0(a2)
        ret

Signed-off-by: Pan Li <pan2.li@intel.com>
Co-authored-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Co-authored-by: kito-cheng <kito.cheng@sifive.com>
gcc/ChangeLog:

* config/riscv/riscv-v.cc (const_vlmax_p): New function for
deciding the mode is constant or not.
(set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vf_avl-1.c: New test.
gcc/config/riscv/riscv-v.cc
gcc/testsuite/gcc.target/riscv/rvv/base/vf_avl-1.c [new file with mode: 0644]