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(parent: e6b8552) | patch
SiFive Freedom E Series RISC-V Machine
authorMichael Clark <mjc@sifive.com>
Fri, 2 Mar 2018 12:31:14 +0000 (01:31 +1300)
committerMichael Clark <mjc@sifive.com>
Tue, 6 Mar 2018 19:30:28 +0000 (08:30 +1300)
commiteb637edb1241aff1442579475da303ee5b672910
tree7d1bcf642b5d0bb89a18af2515d428d68b541b96tree | snapshot
parente6b8552c655aad405e7dc28d84b4a6d5324f1b92commit | diff
SiFive Freedom E Series RISC-V Machine

This provides a RISC-V Board compatible with the the SiFive Freedom E SDK.
The following machine is implemented:

- 'sifive_e'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
hw/riscv/sifive_e.c [new file with mode: 0644] blob
include/hw/riscv/sifive_e.h [new file with mode: 0644] blob
Mirror of https://git.qemu.org/git/qemu.git