gcc/ChangeLog:

gcc/ChangeLog:

2017-07-17  Carl Love  <cel@us.ibm.com>

	Revert commit r249424	2017-06-20  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
	ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
	ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
	builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.
	* config/rs6000/altivec.md (MVULEUW, VMULESW, VMULOUW,
	VMULOSW): New enum "unspec" values.
	(vec_widen_umult_even_v4si, vec_widen_smult_even_v4si,
	vec_widen_umult_odd_v4si, vec_widen_smult_odd_v4si,
	altivec_vmuleuw, altivec_vmulesw, altivec_vmulouw,
	altivec_vmulosw): New patterns.
	* config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
	VMULOSW): Add definitions.

gcc/testsuite/ChangeLog:

2017-07-17  Carl Love  <cel@us.ibm.com>

	Revert commit r249572 	2017-06-22 Carl Love  <cel@us.ibm.com>
	test case changes for commit 249424

	* gcc.target/powerpc/builtins-2.c (vmulosh, vmulouh, vmulesh,
	vmuleuh): Fix scan-assembler-times should check for word not half word
	instructions.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@250295 138bc75d-0d04-0410-961f-82ee72b054a4