gcc/

gcc/

2009-02-10  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/39119
	* config/i386/i386.c (x86_64_reg_class): Remove X86_64_AVX_CLASS.
	(x86_64_reg_class_name): Removed.
	(classify_argument): Return 0 if bytes > 32.  Return 0 if the
	first one isn't X86_64_SSE_CLASS or any other ones aren't
	X86_64_SSEUP_CLASS when size > 16bytes.  Don't turn
	X86_64_SSEUP_CLASS into X86_64_SSE_CLASS if the preceded one
	is X86_64_SSEUP_CLASS.  Set AVX modes to 1 X86_64_SSE_CLASS
	and 3 X86_64_SSEUP_CLASS.
	(construct_container): Remove X86_64_AVX_CLASS.  Handle 4
	registers with 1 X86_64_SSE_CLASS and 3 X86_64_SSEUP_CLASS.

gcc/testsuite/

2009-02-10  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/39119
	* gcc.target/x86_64/abi/avx/abi-avx.exp: New.
	* gcc.target/x86_64/abi/avx/args.h: Likewise.
	* gcc.target/x86_64/abi/avx/asm-support.S: Likewise.
	* gcc.target/x86_64/abi/avx/avx-check.h: Likewise.
	* gcc.target/x86_64/abi/avx/test_m256_returning.c: Likewise.
	* gcc.target/x86_64/abi/avx/test_passing_m256.c: Likewise.
	* gcc.target/x86_64/abi/avx/test_passing_structs.c: Likewise.
	* gcc.target/x86_64/abi/avx/test_passing_unions.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@144058 138bc75d-0d04-0410-961f-82ee72b054a4