[AArch64] Fix errors rebasing the ARMv8.2 AT and system registers patch

[AArch64] Fix errors rebasing the ARMv8.2 AT and system registers patch

A mistake with rebasing the ARMv8.2 AT instruction patch left this part

+  /* AT S1E1RP, AT S1E1WP.  Values are from aarch64_sys_regs_at.  */
+  if ((reg->value == CPENS (0, C7, C9, 0)
+       || reg->value == CPENS (0, C7, C9, 1))
+      && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+    return FALSE;

in aarch64_pstatefield_supported_p rather than in
aarch64_sys_ins_reg_supported_p, where it was supposed to be.

The patch adding support for id_aa64mmfr2_el1, also had the effect of
removing a conditional branch in aarch64_sys_reg_supported_p.

The effect of both of these is to suppress an error if some ARMv8.2
system registers are used with the wrong -march settings.

This patch fixes these mistakes.

opcodes/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Add mistakenly
	removed statement.
	(aarch64_pstatefield_supported_p): Move feature checks for AT
	registers ..
	(aarch64_sys_ins_reg_supported_p): .. to here.

Change-Id: I48783d118eaaf0f3312e8b08a8340ef7af4e36a4