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2016-09-01 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
authorwschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 1 Sep 2016 14:43:55 +0000 (14:43 +0000)
committerwschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 1 Sep 2016 14:43:55 +0000 (14:43 +0000)
commitf243884d773037e664e98c3040048892344ac2af
treee22b92f2589ee7abe2232371b29b35a4ac90bfectree
parent15182c1d1c1f1d0c94606ad36ed0fa26e5f9303dcommit | diff
2016-09-01  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
    Michael Meissner <meissner@linux.vnet.ibm.com>

PR target/72827
* config/rs6000/rs6000.c (rs6000_legitimize_address): Avoid
reg+reg addressing for TImode.
(rs6000_legitimate_address_p): Only allow register indirect
addressing for TImode, even without TARGET_QUAD_MEMORY.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@239938 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/config/rs6000/rs6000.c diff | blob | blame | history
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