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(parent: d9aff83) | patch
hw/arm/xilinx_zynq: Add cache controller
authorSebastian Huber <sebastian.huber@embedded-brains.de>
Fri, 24 May 2024 12:08:36 +0000 (14:08 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 30 May 2024 12:21:06 +0000 (13:21 +0100)
commitf271877307f1bb43ac4031bf6d962bdd86caa498
tree96baa30ca22b8cbcba3c7fe12d3cf50b64d36ac8tree
parentd9aff83ad569714ec1b05176942a80fd80e062b7commit | diff
hw/arm/xilinx_zynq: Add cache controller

The Zynq 7000 SoCs contain a CoreLink L2C-310 cache controller.  Add the
corresponding Qemu device to the xilinx-zynq-a9 machine.

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Message-id: 20240524120837.10057-2-sebastian.huber@embedded-brains.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/Kconfig diff | blob | blame | history
hw/arm/xilinx_zynq.c diff | blob | blame | history
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