]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/arm: Return correct result for LDG when ATA=0
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 19 Jun 2023 10:20:18 +0000 (11:20 +0100)
committerMichael Tokarev <mjt@tls.msk.ru>
Thu, 22 Jun 2023 07:35:22 +0000 (10:35 +0300)
commitf38ca28c664dacf503822c7445412dd19942824c
tree63f07f0bf15f415704def7e83160e96962055937
parent2bdaf891625fe89161ea652442d76e3a6e6ee4d0
target/arm: Return correct result for LDG when ATA=0

The LDG instruction loads the tag from a memory address (identified
by [Xn + offset]), and then merges that tag into the destination
register Xt. We implemented this correctly for the case when
allocation tags are enabled, but didn't get it right when ATA=0:
instead of merging the tag bits into Xt, we merged them into the
memory address [Xn + offset] and then set Xt to that.

Merge the tag bits into the old Xt value, as they should be.

Cc: qemu-stable@nongnu.org
Fixes: c15294c1e36a7dd9b25 ("target/arm: Implement LDG, STG, ST2G instructions")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 7e2788471f9e079fff696a694721a7d41a451839)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target/arm/tcg/translate-a64.c