]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/net/cadence_gem: fix register mask initialization
authorLuc Michel <luc.michel@amd.com>
Wed, 16 Jul 2025 09:53:43 +0000 (11:53 +0200)
committerMichael Tokarev <mjt@tls.msk.ru>
Tue, 29 Jul 2025 17:15:11 +0000 (20:15 +0300)
commitf74d5de0462ef257dfed03b987145ec7ca3a10d3
tree2b5538eaa038bd59bc7ca3db626c2d755986b83d
parentb662b0e86256de0c029768af6038076dd89bad12
hw/net/cadence_gem: fix register mask initialization

The gem_init_register_masks function was called at init time but it
relies on the num-priority-queues property. Call it at realize time
instead.

Cc: qemu-stable@nongnu.org
Fixes: 4c70e32f05f ("net: cadence_gem: Define access permission for interrupt registers")
Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Message-ID: <20250716095432.81923-2-luc.michel@amd.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
(cherry picked from commit 2bfcd27e00a49da2efa5d703121b94cd9cd4948b)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
hw/net/cadence_gem.c