]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/ppc: Add IBM PPE42 special instructions
authorGlenn Miles <milesg@linux.ibm.com>
Thu, 25 Sep 2025 20:17:44 +0000 (15:17 -0500)
committerHarsh Prateek Bora <harshpb@linux.ibm.com>
Sun, 28 Sep 2025 18:06:13 +0000 (23:36 +0530)
commitf7ec91c23906ca364650e95f2a28e0ef6c411386
tree351353cb4dcdb75fc49a58f5e3a9f1c40f51c181
parent880aa4cb06ff5e86b6feab3030e14a16fea1dced
target/ppc: Add IBM PPE42 special instructions

Adds the following instructions exclusively for
IBM PPE42 processors:

  LSKU
  LCXU
  STSKU
  STCXU
  LVD
  LVDU
  LVDX
  STVD
  STVDU
  STVDX
  SLVD
  SRVD
  CMPWBC
  CMPLWBC
  CMPWIBC
  BNBWI
  BNBW
  CLRBWIBC
  CLRWBC
  DCBQ
  RLDICL
  RLDICR
  RLDIMI

A PPE42 GCC compiler is available here:
https://github.com/open-power/ppe42-gcc

For more information on the PPE42 processors please visit:
https://wiki.raptorcs.com/w/images/a/a3/PPE_42X_Core_Users_Manual.pdf

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20250925201758.652077-7-milesg@linux.ibm.com
Message-ID: <20250925201758.652077-7-milesg@linux.ibm.com>
target/ppc/insn32.decode
target/ppc/translate.c
target/ppc/translate/ppe-impl.c.inc [new file with mode: 0644]