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target/mips: Remove CPUMIPSState::CP0_SAARI field
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Fri, 9 Feb 2024 07:55:48 +0000 (08:55 +0100)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Thu, 15 Feb 2024 14:53:12 +0000 (15:53 +0100)
commitfa82742621c3d26cde6383b1c0f891d23f01078f
tree40d9b4f947e986768cc85e12a256fada4d28e0f1tree
parentee58fddcbbb2374b62065cd97888e4478aa02a95commit | diff
target/mips: Remove CPUMIPSState::CP0_SAARI field

Remove the unused CP0_SAARI register.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240209090513.9401-10-philmd@linaro.org>
target/mips/cpu.h diff | blob | blame | history
target/mips/sysemu/machine.c diff | blob | blame | history
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