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author	rts <rts@138bc75d-0d04-0410-961f-82ee72b054a4>
	Tue, 12 Jun 2018 10:36:12 +0000 (10:36 +0000)
committer	rts <rts@138bc75d-0d04-0410-961f-82ee72b054a4>
	Tue, 12 Jun 2018 10:36:12 +0000 (10:36 +0000)
commit	fbe457c893d2c7fed2b40b55a636731164922295
tree	efce2315ec5fc808e8ca688a92411c1e43a90a86	tree
parent	e3dae8fad14dccb52325cea720c450c3747f78e0	commit \| diff

MIPS: Add i6500 processor as an alias for i6400.

gcc/ChangeLog:

2018-06-12 Matthew Fortune <mfortune@gmail.com>

* config/mips/mips-cpus.def: New MIPS_CPU for i6500.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Mark i6500 as
mips64r6.
* doc/invoke.texi: Document -march=i6500.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@261490 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog		diff \| blob \| blame \| history
gcc/config/mips/mips-cpus.def		diff \| blob \| blame \| history
gcc/config/mips/mips-tables.opt		diff \| blob \| blame \| history
gcc/config/mips/mips.h		diff \| blob \| blame \| history
gcc/doc/invoke.texi		diff \| blob \| blame \| history

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