]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Add vsub.vx C API tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Fri, 3 Feb 2023 07:06:22 +0000 (15:06 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Fri, 10 Feb 2023 11:27:02 +0000 (19:27 +0800)
commitfe9e2eccb9e9e82779fa60a8a2f5cb0f62ac399e
treecf63e2ec15413bfc41ab14f93a014d6405916428
parente9d5e4ac35753b0adabed4c18c5e0f417f8827e5
RISC-V: Add vsub.vx C API tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vsub_vx_m_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_m_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_m_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_m_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_m_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_m_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tumu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tumu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tumu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tumu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tumu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vsub_vx_tumu_rv64-3.c: New test.
36 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_m_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_m_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_m_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_m_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_m_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_m_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tumu_rv32-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tumu_rv32-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tumu_rv32-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tumu_rv64-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tumu_rv64-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vsub_vx_tumu_rv64-3.c [new file with mode: 0644]