RISC-V: Add testcases for form 6 of scalar signed SAT_TRUNC

RISC-V: Add testcases for form 6 of scalar signed SAT_TRUNC

Form 6:
  #define DEF_SAT_S_TRUNC_FMT_6(NT, WT, NT_MIN, NT_MAX) \
  NT __attribute__((noinline))                          \
  sat_s_trunc_##WT##_to_##NT##_fmt_6 (WT x)             \
  {                                                     \
    NT trunc = (NT)x;                                   \
    return (WT)NT_MIN >= x || x > (WT)NT_MAX            \
      ? x < 0 ? NT_MIN : NT_MAX                         \
      : trunc;                                          \
  }

The below test are passed for this patch.
* The rv64gcv fully regression test.

It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add test helper macros.
	* gcc.target/riscv/sat_s_trunc-6-i16-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-6-i32-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-6-i32-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-6-i64-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-6-i64-to-i32.c: New test.
	* gcc.target/riscv/sat_s_trunc-6-i64-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-6-i16-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-6-i32-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-6-i32-to-i8.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-6-i64-to-i16.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-6-i64-to-i32.c: New test.
	* gcc.target/riscv/sat_s_trunc-run-6-i64-to-i8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>