]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv: Add check for 16-bit aligned PC for different priv versions.
authorYu-Ming Chang <yumin686@andestech.com>
Thu, 13 Mar 2025 06:07:58 +0000 (14:07 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 19 Mar 2025 07:11:46 +0000 (17:11 +1000)
commitffe4db11f8aed79c7ec7d3ebd92674a1cfab4fe7
tree73dc87594ee068fbedf4477a5aa3af5915856c57
parent1a010d22b7adecf0fb1c069e1e535af1aa51e9cf
target/riscv: Add check for 16-bit aligned PC for different priv versions.

For privilege version 1.12 or newer, C always implies Zca. We can only
check ext_zca to allow 16-bit aligned PC addresses. For older privilege
versions, we only check C.

Signed-off-by: Yu-Ming Chang <yumin686@andestech.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <174184718265.10540.10120024221661781046-0@git.sr.ht>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h
target/riscv/insn_trans/trans_rvi.c.inc
target/riscv/op_helper.c
target/riscv/translate.c