The previous code was not actually using the size of a symbol when the
symbol was in the hash table. This meant that our TLS relaxations
created an instruction sequence with bounds of zero so that the GCC TLS
instruction sequence eventually ended up giving a length-zero
capability.
Also handle extra size of pointers in TCB for c64. For purecap we have
16 byte pointers. Hence the TCB is 32 bytes. This was not yet handled
in our relaxations.
Here we determine whether to use a 32 or 16 byte TCB based on the flags
of the current BFD (i.e. whether this is a purecap binary that we're
creating).
Testcases are updated to account for the fact that the length
of the capability to the symbol itself is now sometimes non-zero and for
the different offset required into the TLS block for modules loaded at
startup time.
}
/* The size of the thread control block which is defined to be two pointers. */
}
/* The size of the thread control block which is defined to be two pointers. */
-#define TCB_SIZE (ARCH_SIZE/8)*2
+#define TCB_SIZE(cur_bfd) \
+ elf_elfheader(cur_bfd)->e_flags & EF_AARCH64_CHERI_PURECAP ? 32 : (ARCH_SIZE/8)*2
struct elf_aarch64_local_symbol
{
struct elf_aarch64_local_symbol
{
/* If tls_sec is NULL, we should have signalled an error already. */
BFD_ASSERT (htab->tls_sec != NULL);
/* If tls_sec is NULL, we should have signalled an error already. */
BFD_ASSERT (htab->tls_sec != NULL);
- bfd_vma base = align_power ((bfd_vma) TCB_SIZE,
+ bfd_vma base = align_power ((bfd_vma) TCB_SIZE (info->output_bfd),
htab->tls_sec->alignment_power);
return htab->tls_sec->vma - base;
}
htab->tls_sec->alignment_power);
return htab->tls_sec->vma - base;
}
BFD_ASSERT (globals && input_bfd && contents && rel);
BFD_ASSERT (globals && input_bfd && contents && rel);
+ if (is_local || !bfd_link_pic (info))
{
if (h != NULL)
sym_size = h->size;
{
if (h != NULL)
sym_size = h->size;
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
- bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
+ bfd_putl32 (add_R0_R0 | (TCB_SIZE (input_bfd) << 10),
contents + rel->r_offset + 4);
return bfd_reloc_ok;
}
contents + rel->r_offset + 4);
return bfd_reloc_ok;
}
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
- bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
+ bfd_putl32 (add_R0_R0 | (TCB_SIZE (input_bfd) << 10),
contents + rel->r_offset + 0);
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
return bfd_reloc_ok;
contents + rel->r_offset + 0);
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
return bfd_reloc_ok;
.*: c29bd042 mrs c2, ctpidr_el0
.*: d2a00001 movz x1, #0x0, lsl #16
.*: d2a00000 movz x0, #0x0, lsl #16
.*: c29bd042 mrs c2, ctpidr_el0
.*: d2a00001 movz x1, #0x0, lsl #16
.*: d2a00000 movz x0, #0x0, lsl #16
-.*: f2800200 movk x0, #0x10
-.*: f2800001 movk x1, #0x0
+.*: f2800400 movk x0, #0x20
+.*: f2800081 movk x1, #0x4
.*: c2a06040 add c0, c2, x0, uxtx
.*: c2c10000 scbnds c0, c0, x1
.*: c2a06040 add c0, c2, x0, uxtx
.*: c2c10000 scbnds c0, c0, x1
.*: c29bd042 mrs c2, ctpidr_el0
.*: d2a00001 movz x1, #0x0, lsl #16
.*: d2a00000 movz x0, #0x0, lsl #16
.*: c29bd042 mrs c2, ctpidr_el0
.*: d2a00001 movz x1, #0x0, lsl #16
.*: d2a00000 movz x0, #0x0, lsl #16
-.*: f2800280 movk x0, #0x14
+.*: f2800480 movk x0, #0x24
.*: f2800281 movk x1, #0x14
.*: c2a06040 add c0, c2, x0, uxtx
.*: c2c10000 scbnds c0, c0, x1
.*: f2800281 movk x1, #0x14
.*: c2a06040 add c0, c2, x0, uxtx
.*: c2c10000 scbnds c0, c0, x1
.*: c29bd042 mrs c2, ctpidr_el0
.*: d2a00001 movz x1, #0x0, lsl #16
.*: d2a00000 movz x0, #0x0, lsl #16
.*: c29bd042 mrs c2, ctpidr_el0
.*: d2a00001 movz x1, #0x0, lsl #16
.*: d2a00000 movz x0, #0x0, lsl #16
-.*: f2800280 movk x0, #0x14
+.*: f2800480 movk x0, #0x24
.*: f2800281 movk x1, #0x14
.*: c2....40 add c0, c2, x0, uxtx
.*: c2c10000 scbnds c0, c0, x1
.*: f2800281 movk x1, #0x14
.*: c2....40 add c0, c2, x0, uxtx
.*: c2c10000 scbnds c0, c0, x1