arm64: vdso: Use __arch_counter_get_cntvct()

While reading how `cntvct_el0` was read in the kernel, I found that
__arch_get_hw_counter() is doing something very similar to what
__arch_counter_get_cntvct() is already doing.

Use the existing __arch_counter_get_cntvct() function instead of
duplicating similar inline assembly code in __arch_get_hw_counter().

Both functions were performing nearly identical operations to read the
cntvct_el0 register. The only difference was that
__arch_get_hw_counter() included a memory clobber in its inline
assembly, which appears unnecessary in this context.

This change simplifies the code by eliminating duplicate functionality
and improves maintainability by centralizing the counter access logic in
a single implementation.

Signed-off-by: Breno Leitao <leitao@debian.org>
Link: https://lore.kernel.org/r/20250407-arm-vdso-v1-1-7012de25b195@debian.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/vdso/gettimeofday.h b/arch/arm64/include/asm/vdso/gettimeofday.h
index 92a2b59a9f3df4d20feb483e6d8ebd1d813b7932..83c315ed5c6e7fe13ca4d04cc4ef869342769387 100644 (file)
--- a/arch/arm64/include/asm/vdso/gettimeofday.h
+++ b/arch/arm64/include/asm/vdso/gettimeofday.h
@@ -8,6 +8,7 @@
 #ifndef __ASSEMBLY__
 
 #include <asm/alternative.h>
+#include <asm/arch_timer.h>
 #include <asm/barrier.h>
 #include <asm/unistd.h>
 #include <asm/sysreg.h>
@@ -69,8 +70,6 @@ int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)
 static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,
                                                 const struct vdso_time_data *vd)
 {
-       u64 res;
-
        /*
         * Core checks for mode already, so this raced against a concurrent
         * update. Return something. Core will do another round and then
@@ -79,24 +78,7 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,
        if (clock_mode == VDSO_CLOCKMODE_NONE)
                return 0;
 
-       /*
-        * If FEAT_ECV is available, use the self-synchronizing counter.
-        * Otherwise the isb is required to prevent that the counter value
-        * is speculated.
-       */
-       asm volatile(
-       ALTERNATIVE("isb\n"
-                   "mrs %0, cntvct_el0",
-                   "nop\n"
-                   __mrs_s("%0", SYS_CNTVCTSS_EL0),
-                   ARM64_HAS_ECV)
-       : "=r" (res)
-       :
-       : "memory");
-
-       arch_counter_enforce_ordering(res);
-
-       return res;
+       return __arch_counter_get_cntvct();
 }
 
 #endif /* !__ASSEMBLY__ */