UWord example_a_bit,
UWord example_v_bit )
{
+ UWord a, vbits8, abits8, vbits32, v_off, a_off;
+ SecMap* sm;
+ SecMap** binder;
+ SecMap* example_dsm;
+
PROF_EVENT(150, "set_address_range_perms");
/* Check the permissions make sense. */
}
}
- UWord a = (UWord)aA;
+ a = (UWord)aA;
# if VG_DEBUG_MEMORY >= 2
/*------------------ debug-only case ------------------ */
- SizeT i;
+ { SizeT i;
- UWord example_vbyte = BIT_TO_BYTE(example_v_bit);
+ UWord example_vbyte = BIT_TO_BYTE(example_v_bit);
- tl_assert(sizeof(SizeT) == sizeof(Addr));
+ tl_assert(sizeof(SizeT) == sizeof(Addr));
- if (0 && len >= 4096)
- VG_(printf)("s_a_r_p(0x%llx, %d, %d,%d)\n",
- (ULong)a, len, example_a_bit, example_v_bit);
+ if (0 && len >= 4096)
+ VG_(printf)("s_a_r_p(0x%llx, %d, %d,%d)\n",
+ (ULong)a, len, example_a_bit, example_v_bit);
- if (len == 0)
- return;
+ if (len == 0)
+ return;
- for (i = 0; i < len; i++) {
- set_abit_and_vbyte(a+i, example_a_bit, example_vbyte);
+ for (i = 0; i < len; i++) {
+ set_abit_and_vbyte(a+i, example_a_bit, example_vbyte);
+ }
}
# else
/*------------------ standard handling ------------------ */
- UWord vbits8, abits8, vbits32, v_off, a_off;
- SecMap* sm;
- SecMap** binder;
- SecMap* example_dsm;
/* Decide on the distinguished secondary that we might want
to use (part of the space-compression scheme). */
static __inline__
void make_aligned_word32_writable ( Addr aA )
{
+ UWord a, sec_no, v_off, a_off, mask;
+ SecMap* sm;
+
PROF_EVENT(300, "make_aligned_word32_writable");
# if VG_DEBUG_MEMORY >= 2
return;
}
- UWord a = (UWord)aA;
- UWord sec_no = (UWord)(a >> 16);
+ a = (UWord)aA;
+ sec_no = (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >= 1
tl_assert(sec_no < N_PRIMARY_MAP);
# endif
if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
primary_map[sec_no] = copy_for_writing(primary_map[sec_no]);
- SecMap* sm = primary_map[sec_no];
- UWord v_off = a & 0xFFFF;
- UWord a_off = v_off >> 3;
+ sm = primary_map[sec_no];
+ v_off = a & 0xFFFF;
+ a_off = v_off >> 3;
/* Paint the new area as uninitialised. */
((UInt*)(sm->vbyte))[v_off >> 2] = VGM_WORD32_INVALID;
- UWord mask = 0x0F;
+ mask = 0x0F;
mask <<= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
/* mask now contains 1s where we wish to make address bits valid
(0s). */
static __inline__
void make_aligned_word32_noaccess ( Addr aA )
{
+ UWord a, sec_no, v_off, a_off, mask;
+ SecMap* sm;
+
PROF_EVENT(310, "make_aligned_word32_noaccess");
# if VG_DEBUG_MEMORY >= 2
return;
}
- UWord a = (UWord)aA;
- UWord sec_no = (UWord)(a >> 16);
+ a = (UWord)aA;
+ sec_no = (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >= 1
tl_assert(sec_no < N_PRIMARY_MAP);
# endif
if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
primary_map[sec_no] = copy_for_writing(primary_map[sec_no]);
- SecMap* sm = primary_map[sec_no];
- UWord v_off = a & 0xFFFF;
- UWord a_off = v_off >> 3;
+ sm = primary_map[sec_no];
+ v_off = a & 0xFFFF;
+ a_off = v_off >> 3;
/* Paint the abandoned data as uninitialised. Probably not
necessary, but still .. */
((UInt*)(sm->vbyte))[v_off >> 2] = VGM_WORD32_INVALID;
- UWord mask = 0x0F;
+ mask = 0x0F;
mask <<= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
/* mask now contains 1s where we wish to make address bits invalid
(1s). */
static __inline__
void make_aligned_word64_writable ( Addr aA )
{
+ UWord a, sec_no, v_off, a_off;
+ SecMap* sm;
+
PROF_EVENT(320, "make_aligned_word64_writable");
# if VG_DEBUG_MEMORY >= 2
return;
}
- UWord a = (UWord)aA;
- UWord sec_no = (UWord)(a >> 16);
+ a = (UWord)aA;
+ sec_no = (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >= 1
tl_assert(sec_no < N_PRIMARY_MAP);
# endif
if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
primary_map[sec_no] = copy_for_writing(primary_map[sec_no]);
- SecMap* sm = primary_map[sec_no];
- UWord v_off = a & 0xFFFF;
- UWord a_off = v_off >> 3;
+ sm = primary_map[sec_no];
+ v_off = a & 0xFFFF;
+ a_off = v_off >> 3;
/* Paint the new area as uninitialised. */
((ULong*)(sm->vbyte))[v_off >> 3] = VGM_WORD64_INVALID;
static __inline__
void make_aligned_word64_noaccess ( Addr aA )
{
+ UWord a, sec_no, v_off, a_off;
+ SecMap* sm;
+
PROF_EVENT(330, "make_aligned_word64_noaccess");
# if VG_DEBUG_MEMORY >= 2
return;
}
- UWord a = (UWord)aA;
- UWord sec_no = (UWord)(a >> 16);
+ a = (UWord)aA;
+ sec_no = (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >= 1
tl_assert(sec_no < N_PRIMARY_MAP);
# endif
if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
primary_map[sec_no] = copy_for_writing(primary_map[sec_no]);
- SecMap* sm = primary_map[sec_no];
- UWord v_off = a & 0xFFFF;
- UWord a_off = v_off >> 3;
+ sm = primary_map[sec_no];
+ v_off = a & 0xFFFF;
+ a_off = v_off >> 3;
/* Paint the abandoned data as uninitialised. Probably not
necessary, but still .. */
VG_REGPARM(1) \
ULong nAME ( Addr aA ) \
{ \
+ UWord mask, a, sec_no, v_off, a_off, abits; \
+ SecMap* sm; \
+ \
PROF_EVENT(200, #nAME); \
\
if (VG_DEBUG_MEMORY >= 2) \
return mc_LOADVn_slow( aA, 8, iS_BIGENDIAN ); \
\
- const UWord mask = ~((0x10000-8) | ((N_PRIMARY_MAP-1) << 16)); \
- UWord a = (UWord)aA; \
+ mask = ~((0x10000-8) | ((N_PRIMARY_MAP-1) << 16)); \
+ a = (UWord)aA; \
\
/* If any part of 'a' indicated by the mask is 1, either */ \
/* 'a' is not naturally aligned, or 'a' exceeds the range */ \
return (UWord)mc_LOADVn_slow( aA, 8, iS_BIGENDIAN ); \
} \
\
- UWord sec_no = (UWord)(a >> 16); \
+ sec_no = (UWord)(a >> 16); \
\
if (VG_DEBUG_MEMORY >= 1) \
tl_assert(sec_no < N_PRIMARY_MAP); \
\
- SecMap* sm = primary_map[sec_no]; \
- UWord v_off = a & 0xFFFF; \
- UWord a_off = v_off >> 3; \
- UWord abits = (UWord)(sm->abits[a_off]); \
+ sm = primary_map[sec_no]; \
+ v_off = a & 0xFFFF; \
+ a_off = v_off >> 3; \
+ abits = (UWord)(sm->abits[a_off]); \
\
if (EXPECTED_TAKEN(abits == VGM_BYTE_VALID)) { \
/* Handle common case quickly: a is suitably aligned, */ \
VG_REGPARM(1) \
void nAME ( Addr aA, ULong vbytes ) \
{ \
+ UWord mask, a, sec_no, v_off, a_off, abits; \
+ SecMap* sm; \
+ \
PROF_EVENT(210, #nAME); \
\
if (VG_DEBUG_MEMORY >= 2) \
mc_STOREVn_slow( aA, 8, vbytes, iS_BIGENDIAN ); \
\
- const UWord mask = ~((0x10000-8) | ((N_PRIMARY_MAP-1) << 16)); \
- UWord a = (UWord)aA; \
+ mask = ~((0x10000-8) | ((N_PRIMARY_MAP-1) << 16)); \
+ a = (UWord)aA; \
\
/* If any part of 'a' indicated by the mask is 1, either */ \
/* 'a' is not naturally aligned, or 'a' exceeds the range */ \
return; \
} \
\
- UWord sec_no = (UWord)(a >> 16); \
+ sec_no = (UWord)(a >> 16); \
\
if (VG_DEBUG_MEMORY >= 1) \
tl_assert(sec_no < N_PRIMARY_MAP); \
\
- SecMap* sm = primary_map[sec_no]; \
- UWord v_off = a & 0xFFFF; \
- UWord a_off = v_off >> 3; \
- UWord abits = (UWord)(sm->abits[a_off]); \
+ sm = primary_map[sec_no]; \
+ v_off = a & 0xFFFF; \
+ a_off = v_off >> 3; \
+ abits = (UWord)(sm->abits[a_off]); \
\
if (EXPECTED_TAKEN(!is_distinguished_sm(sm) \
&& abits == VGM_BYTE_VALID)) { \
VG_REGPARM(1) \
UWord nAME ( Addr aA ) \
{ \
+ UWord mask, a, sec_no, v_off, a_off, abits; \
+ SecMap* sm; \
+ \
PROF_EVENT(220, #nAME); \
\
if (VG_DEBUG_MEMORY >= 2) \
return (UWord)mc_LOADVn_slow( aA, 4, iS_BIGENDIAN ); \
\
- const UWord mask = ~((0x10000-4) | ((N_PRIMARY_MAP-1) << 16)); \
- UWord a = (UWord)aA; \
+ mask = ~((0x10000-4) | ((N_PRIMARY_MAP-1) << 16)); \
+ a = (UWord)aA; \
\
/* If any part of 'a' indicated by the mask is 1, either */ \
/* 'a' is not naturally aligned, or 'a' exceeds the range */ \
return (UWord)mc_LOADVn_slow( aA, 4, iS_BIGENDIAN ); \
} \
\
- UWord sec_no = (UWord)(a >> 16); \
+ sec_no = (UWord)(a >> 16); \
\
if (VG_DEBUG_MEMORY >= 1) \
tl_assert(sec_no < N_PRIMARY_MAP); \
\
- SecMap* sm = primary_map[sec_no]; \
- UWord v_off = a & 0xFFFF; \
- UWord a_off = v_off >> 3; \
- UWord abits = (UWord)(sm->abits[a_off]); \
+ sm = primary_map[sec_no]; \
+ v_off = a & 0xFFFF; \
+ a_off = v_off >> 3; \
+ abits = (UWord)(sm->abits[a_off]); \
abits >>= (a & 4); \
abits &= 15; \
if (EXPECTED_TAKEN(abits == VGM_NIBBLE_VALID)) { \
VG_REGPARM(2) \
void nAME ( Addr aA, UWord vbytes ) \
{ \
+ UWord mask, a, sec_no, v_off, a_off, abits; \
+ SecMap* sm; \
+ \
PROF_EVENT(230, #nAME); \
\
if (VG_DEBUG_MEMORY >= 2) \
mc_STOREVn_slow( aA, 4, (ULong)vbytes, iS_BIGENDIAN ); \
\
- const UWord mask = ~((0x10000-4) | ((N_PRIMARY_MAP-1) << 16)); \
- UWord a = (UWord)aA; \
+ mask = ~((0x10000-4) | ((N_PRIMARY_MAP-1) << 16)); \
+ a = (UWord)aA; \
\
/* If any part of 'a' indicated by the mask is 1, either */ \
/* 'a' is not naturally aligned, or 'a' exceeds the range */ \
return; \
} \
\
- UWord sec_no = (UWord)(a >> 16); \
+ sec_no = (UWord)(a >> 16); \
\
if (VG_DEBUG_MEMORY >= 1) \
tl_assert(sec_no < N_PRIMARY_MAP); \
\
- SecMap* sm = primary_map[sec_no]; \
- UWord v_off = a & 0xFFFF; \
- UWord a_off = v_off >> 3; \
- UWord abits = (UWord)(sm->abits[a_off]); \
+ sm = primary_map[sec_no]; \
+ v_off = a & 0xFFFF; \
+ a_off = v_off >> 3; \
+ abits = (UWord)(sm->abits[a_off]); \
abits >>= (a & 4); \
abits &= 15; \
if (EXPECTED_TAKEN(!is_distinguished_sm(sm) \
VG_REGPARM(1) \
UWord nAME ( Addr aA ) \
{ \
+ UWord mask, a, sec_no, v_off, a_off, abits; \
+ SecMap* sm; \
+ \
PROF_EVENT(240, #nAME); \
\
if (VG_DEBUG_MEMORY >= 2) \
return (UWord)mc_LOADVn_slow( aA, 2, iS_BIGENDIAN ); \
\
- const UWord mask = ~((0x10000-2) | ((N_PRIMARY_MAP-1) << 16)); \
- UWord a = (UWord)aA; \
+ mask = ~((0x10000-2) | ((N_PRIMARY_MAP-1) << 16)); \
+ a = (UWord)aA; \
\
/* If any part of 'a' indicated by the mask is 1, either */ \
/* 'a' is not naturally aligned, or 'a' exceeds the range */ \
return (UWord)mc_LOADVn_slow( aA, 2, iS_BIGENDIAN ); \
} \
\
- UWord sec_no = (UWord)(a >> 16); \
+ sec_no = (UWord)(a >> 16); \
\
if (VG_DEBUG_MEMORY >= 1) \
tl_assert(sec_no < N_PRIMARY_MAP); \
\
- SecMap* sm = primary_map[sec_no]; \
- UWord v_off = a & 0xFFFF; \
- UWord a_off = v_off >> 3; \
- UWord abits = (UWord)(sm->abits[a_off]); \
+ sm = primary_map[sec_no]; \
+ v_off = a & 0xFFFF; \
+ a_off = v_off >> 3; \
+ abits = (UWord)(sm->abits[a_off]); \
if (EXPECTED_TAKEN(abits == VGM_BYTE_VALID)) { \
/* Handle common case quickly: a is mapped, and the */ \
/* entire word32 it lives in is addressible. */ \
VG_REGPARM(2) \
void nAME ( Addr aA, UWord vbytes ) \
{ \
+ UWord mask, a, sec_no, v_off, a_off, abits; \
+ SecMap* sm; \
+ \
PROF_EVENT(250, #nAME); \
\
if (VG_DEBUG_MEMORY >= 2) \
mc_STOREVn_slow( aA, 2, (ULong)vbytes, iS_BIGENDIAN ); \
\
- const UWord mask = ~((0x10000-2) | ((N_PRIMARY_MAP-1) << 16)); \
- UWord a = (UWord)aA; \
+ mask = ~((0x10000-2) | ((N_PRIMARY_MAP-1) << 16)); \
+ a = (UWord)aA; \
\
/* If any part of 'a' indicated by the mask is 1, either */ \
/* 'a' is not naturally aligned, or 'a' exceeds the range */ \
return; \
} \
\
- UWord sec_no = (UWord)(a >> 16); \
+ sec_no = (UWord)(a >> 16); \
\
if (VG_DEBUG_MEMORY >= 1) \
tl_assert(sec_no < N_PRIMARY_MAP); \
\
- SecMap* sm = primary_map[sec_no]; \
- UWord v_off = a & 0xFFFF; \
- UWord a_off = v_off >> 3; \
- UWord abits = (UWord)(sm->abits[a_off]); \
+ sm = primary_map[sec_no]; \
+ v_off = a & 0xFFFF; \
+ a_off = v_off >> 3; \
+ abits = (UWord)(sm->abits[a_off]); \
if (EXPECTED_TAKEN(!is_distinguished_sm(sm) \
&& abits == VGM_BYTE_VALID)) { \
/* Handle common case quickly. */ \
VG_REGPARM(1)
UWord MC_(helperc_LOADV1) ( Addr aA )
{
+ UWord mask, a, sec_no, v_off, a_off, abits;
+ SecMap* sm;
+
PROF_EVENT(260, "helperc_LOADV1");
# if VG_DEBUG_MEMORY >= 2
return (UWord)mc_LOADVn_slow( aA, 1, False/*irrelevant*/ );
# else
- const UWord mask = ~((0x10000-1) | ((N_PRIMARY_MAP-1) << 16));
- UWord a = (UWord)aA;
+ mask = ~((0x10000-1) | ((N_PRIMARY_MAP-1) << 16));
+ a = (UWord)aA;
/* If any part of 'a' indicated by the mask is 1, it means 'a'
exceeds the range covered by the primary map. In which case we
return (UWord)mc_LOADVn_slow( aA, 1, False/*irrelevant*/ );
}
- UWord sec_no = (UWord)(a >> 16);
+ sec_no = (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >= 1
tl_assert(sec_no < N_PRIMARY_MAP);
# endif
- SecMap* sm = primary_map[sec_no];
- UWord v_off = a & 0xFFFF;
- UWord a_off = v_off >> 3;
- UWord abits = (UWord)(sm->abits[a_off]);
+ sm = primary_map[sec_no];
+ v_off = a & 0xFFFF;
+ a_off = v_off >> 3;
+ abits = (UWord)(sm->abits[a_off]);
if (EXPECTED_TAKEN(abits == VGM_BYTE_VALID)) {
/* Handle common case quickly: a is mapped, and the entire
word32 it lives in is addressible. */
VG_REGPARM(2)
void MC_(helperc_STOREV1) ( Addr aA, UWord vbyte )
{
+ UWord mask, a, sec_no, v_off, a_off, abits;
+ SecMap* sm;
+
PROF_EVENT(270, "helperc_STOREV1");
# if VG_DEBUG_MEMORY >= 2
mc_STOREVn_slow( aA, 1, (ULong)vbyte, False/*irrelevant*/ );
# else
- const UWord mask = ~((0x10000-1) | ((N_PRIMARY_MAP-1) << 16));
- UWord a = (UWord)aA;
+ mask = ~((0x10000-1) | ((N_PRIMARY_MAP-1) << 16));
+ a = (UWord)aA;
/* If any part of 'a' indicated by the mask is 1, it means 'a'
exceeds the range covered by the primary map. In which case we
defer to the slow-path case. */
return;
}
- UWord sec_no = (UWord)(a >> 16);
+ sec_no = (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >= 1
tl_assert(sec_no < N_PRIMARY_MAP);
# endif
- SecMap* sm = primary_map[sec_no];
- UWord v_off = a & 0xFFFF;
- UWord a_off = v_off >> 3;
- UWord abits = (UWord)(sm->abits[a_off]);
+ sm = primary_map[sec_no];
+ v_off = a & 0xFFFF;
+ a_off = v_off >> 3;
+ abits = (UWord)(sm->abits[a_off]);
if (EXPECTED_TAKEN(!is_distinguished_sm(sm)
&& abits == VGM_BYTE_VALID)) {
/* Handle common case quickly: a is mapped, the entire word32 it
static void mc_fini ( Int exitcode )
{
- MAC_(common_fini)( mc_detect_memory_leaks );
-
Int i, n_accessible_dist;
SecMap* sm;
+ MAC_(common_fini)( mc_detect_memory_leaks );
+
if (VG_(clo_verbosity) > 1) {
VG_(message)(Vg_DebugMsg,
" memcheck: sanity checks: %d cheap, %d expensive",