drm/amd/display: Update chip_cap defines and usage

[WHY]
The defines have also been updated with prefix AMD_ and atomfirmware.h
has been temporarily updated with both sets of defines to allow the
transition.
This update is being made to standardize workaround chip_cap flags,
in order to support more workaround flags in the future.

[HOW]
Updated EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN define, the flag is now
an enum masked by EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK. All checks for
DP_FIXED_VS_EN are now performed by masking with EXT_CHIP_MASK and
checking for an exact match rather than the previous bitwise AND check.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index c9a6de110b742f198811bc74ef9c584cb5fe1910..a62f6c51301c3e5e5929b2b49f41727356d95b45 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -3088,11 +3088,12 @@ static enum bp_result construct_integrated_info(
                                                info->ext_disp_conn_info.path[i].ext_encoder_obj_id.id,
                                                info->ext_disp_conn_info.path[i].caps
                                                );
-                       if (info->ext_disp_conn_info.path[i].caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN)
-                               DC_LOG_BIOS("BIOS EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN on path %d\n", i);
+                       if ((info->ext_disp_conn_info.path[i].caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN)
+                               DC_LOG_BIOS("BIOS AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN on path %d\n", i);
                        else if (bp->base.ctx->dc->config.force_bios_fixed_vs) {
-                               info->ext_disp_conn_info.path[i].caps |= EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN;
-                               DC_LOG_BIOS("driver forced EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN on path %d\n", i);
+                               info->ext_disp_conn_info.path[i].caps &= ~AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK;
+                               info->ext_disp_conn_info.path[i].caps |= AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN;
+                               DC_LOG_BIOS("driver forced AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN on path %d\n", i);
                        }
                }
                // Log the Checksum and Voltage Swing

diff --git a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
index ff8fe1a94965b9202b289ce3a96489da0e128da9..96febabf464af0114bc5f733d6de2b16c653e464 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
+++ b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
@@ -251,7 +251,7 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link)
 
        link_training_settings.lttpr_mode = dp_decide_lttpr_mode(link, &link->cur_link_settings);
 
-       if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+       if (((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
                        link_training_settings.lttpr_mode == LTTPR_MODE_TRANSPARENT)
                dp_fixed_vs_pe_read_lane_adjust(
                                link,
@@ -646,7 +646,7 @@ bool dp_set_test_pattern(
        if (IS_DP_PHY_PATTERN(test_pattern)) {
                /* Set DPCD Lane Settings before running test pattern */
                if (p_link_settings != NULL) {
-                       if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+                       if (((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
                                        p_link_settings->lttpr_mode == LTTPR_MODE_TRANSPARENT) {
                                dp_fixed_vs_pe_set_retimer_lane_settings(
                                                link,

diff --git a/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c b/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c
index 348ea4cb832decff67fba6fa06a825729404f367..a6d1d7641ab4db098d666ea5d20e436d1a6ad033 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c
+++ b/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c
@@ -187,7 +187,7 @@ static const struct link_hwss dio_fixed_vs_pe_retimer_link_hwss = {
 
 bool requires_fixed_vs_pe_retimer_dio_link_hwss(const struct dc_link *link)
 {
-       return (link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN);
+       return ((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN);
 }
 
 const struct link_hwss *get_dio_fixed_vs_pe_retimer_link_hwss(void)

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index ae79dc2139011b2d7a1b4e0ce2a48de3a00babdc..b8cfeb98e22997a242a4f29143ff5d6be8c494c3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -1974,8 +1974,8 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
 
        if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {
                unsigned short masked_chip_caps = pipe_ctx->stream->link->chip_caps &
-                               EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK;
-               if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
+                               AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK;
+               if (masked_chip_caps == AMD_EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
                        /* DP159, Retimer settings */
                        eng_id = pipe_ctx->stream_res.stream_enc->id;
 
@@ -1986,7 +1986,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
                                write_i2c_default_retimer_setting(pipe_ctx,
                                                is_vga_mode, is_over_340mhz);
                        }
-               } else if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204) {
+               } else if (masked_chip_caps == AMD_EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204) {
                        /* PI3EQX1204, Redriver settings */
                        write_i2c_redriver_setting(pipe_ctx, is_over_340mhz);
                }
@@ -2042,7 +2042,7 @@ static enum dc_status enable_link_dp(struct dc_state *state,
        int lt_attempts = LINK_TRAINING_ATTEMPTS;
 
        // Increase retry count if attempting DP1.x on FIXED_VS link
-       if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+       if (((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
                        link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING)
                lt_attempts = 10;
 
@@ -2394,13 +2394,13 @@ void link_set_dpms_off(struct pipe_ctx *pipe_ctx)
                enum engine_id eng_id = pipe_ctx->stream_res.stream_enc->id;
 
                unsigned short masked_chip_caps = link->chip_caps &
-                               EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK;
+                               AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK;
                //Need to inform that sink is going to use legacy HDMI mode.
                write_scdc_data(
                        link->ddc,
                        165000,//vbios only handles 165Mhz.
                        false);
-               if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
+               if (masked_chip_caps == AMD_EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
                        /* DP159, Retimer settings */
                        if (get_ext_hdmi_settings(pipe_ctx, eng_id, &settings))
                                write_i2c_retimer_setting(pipe_ctx,
@@ -2408,7 +2408,7 @@ void link_set_dpms_off(struct pipe_ctx *pipe_ctx)
                        else
                                write_i2c_default_retimer_setting(pipe_ctx,
                                                false, false);
-               } else if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204) {
+               } else if (masked_chip_caps == AMD_EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204) {
                        /* PI3EQX1204, Redriver settings */
                        write_i2c_redriver_setting(pipe_ctx, false);
                }

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
index 334f985186d2f9f31bad477a99bfa87e37ee87f5..a7877d57a00fa13ce8acddfcac9a687d132e5f4c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_factory.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
@@ -699,7 +699,7 @@ static bool construct_phy(struct dc_link *link,
                                                  link->chip_caps);
                                }
 
-                               if (link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) {
+                               if ((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) {
                                        link->bios_forced_drive_settings.VOLTAGE_SWING =
                                                (bios->integrated_info->ext_disp_conn_info.fixdpvoltageswing & 0x3);
                                        link->bios_forced_drive_settings.PRE_EMPHASIS =

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
index d6d5bbf2108c5afaa976aa158725b9c044bddb0c..267180e7bc48fb7fa9ac6d9c266af94698121279 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
@@ -505,7 +505,7 @@ bool try_to_configure_aux_timeout(struct ddc_service *ddc,
        bool result = false;
        struct ddc *ddc_pin = ddc->ddc_pin;
 
-       if ((ddc->link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+       if (((ddc->link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
                        !ddc->link->dc->debug.disable_fixed_vs_aux_timeout_wa &&
                        ddc->ctx->dce_version == DCN_VERSION_3_1) {
                /* Fixed VS workaround for AUX timeout */

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index d1d869cc85c79f7d4fc33e7f0630bdb7f1375799..d0fbf9c44a29874fa3a4e7149c703c9bbc462711 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -1554,7 +1554,7 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link)
 
        /* If this chip cap is set, at least one retimer must exist in the chain
         * Override count to 1 if we receive a known bad count (0 or an invalid value) */
-       if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+       if (((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
                        (dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) == 0)) {
                /* If you see this message consistently, either the host platform has FIXED_VS flag
                 * incorrectly configured or the sink device is returning an invalid count.

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c
index bafa52a0165a08039a7bf73fe4713495b9113779..2c73ac87cd665c0a9502315c45e2db83bae79b2d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c
@@ -104,7 +104,7 @@ void dp_set_hw_lane_settings(
        // Don't return here if using FIXED_VS link HWSS and encoding is 128b/132b
        if ((link_settings->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT) &&
                        !is_immediate_downstream(link, offset) &&
-                       (!(link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) ||
+                       (!((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) ||
                        link_dp_get_encoding_format(&link_settings->link_settings) == DP_8b_10b_ENCODING))
                return;
 

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
index 754c895e1bfbde5b144ef1ed5cdcbd1e129c46d9..88d4288cde0f5869a72094192a27e78bd8068a51 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
@@ -739,7 +739,7 @@ void override_training_settings(
        if (overrides->ffe_preset != NULL)
                lt_settings->ffe_preset = overrides->ffe_preset;
        /* Override HW lane settings with BIOS forced values if present */
-       if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+       if ((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
                        lt_settings->lttpr_mode == LTTPR_MODE_TRANSPARENT) {
                lt_settings->voltage_swing = &link->bios_forced_drive_settings.VOLTAGE_SWING;
                lt_settings->pre_emphasis = &link->bios_forced_drive_settings.PRE_EMPHASIS;
@@ -1574,7 +1574,7 @@ enum link_training_result dp_perform_link_training(
         * Per DP specs starting from here, DPTX device shall not issue
         * Non-LT AUX transactions inside training mode.
         */
-       if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) && encoding == DP_8b_10b_ENCODING)
+       if (((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) && encoding == DP_8b_10b_ENCODING)
                status = dp_perform_fixed_vs_pe_training_sequence(link, link_res, &lt_settings);
        else if (encoding == DP_8b_10b_ENCODING)
                status = dp_perform_8b_10b_link_training(link, link_res, &lt_settings);