arm64/boot: Enable EL2 requirements for SPE_FEAT_FDS

SPE data source filtering (optional from Armv8.8) requires that traps to
the filter register PMSDSFR be disabled. Document the requirements and
disable the traps if the feature is present.

Tested-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/Documentation/arch/arm64/booting.rst b/Documentation/arch/arm64/booting.rst
index 2f666a7c303cdf69e579cccf59fb78795519ca10..e4f953839f7181ef5016e7f25e3f729dc5cb7bd7 100644 (file)
--- a/Documentation/arch/arm64/booting.rst
+++ b/Documentation/arch/arm64/booting.rst
@@ -466,6 +466,17 @@ Before jumping into the kernel, the following conditions must be met:
     - HDFGWTR2_EL2.nPMICFILTR_EL0 (bit 3) must be initialised to 0b1.
     - HDFGWTR2_EL2.nPMUACR_EL1 (bit 4) must be initialised to 0b1.
 
+  For CPUs with SPE data source filtering (FEAT_SPE_FDS):
+
+  - If EL3 is present:
+
+    - MDCR_EL3.EnPMS3 (bit 42) must be initialised to 0b1.
+
+  - If the kernel is entered at EL1 and EL2 is present:
+
+    - HDFGRTR2_EL2.nPMSDSFR_EL1 (bit 19) must be initialised to 0b1.
+    - HDFGWTR2_EL2.nPMSDSFR_EL1 (bit 19) must be initialised to 0b1.
+
   For CPUs with Memory Copy and Memory Set instructions (FEAT_MOPS):
 
   - If the kernel is entered at EL1 and EL2 is present:

diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index a305386eb2e379d08389397d412ad9be3dadcae4..b37da3ee852963a9c80ffb6ae6554b682b0f0656 100644 (file)
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -392,6 +392,17 @@
        orr     x0, x0, #HDFGRTR2_EL2_nPMICFILTR_EL0
        orr     x0, x0, #HDFGRTR2_EL2_nPMUACR_EL1
 .Lskip_pmuv3p9_\@:
+       /* If SPE is implemented, */
+       __spe_vers_imp .Lskip_spefds_\@, ID_AA64DFR0_EL1_PMSVer_IMP, x1
+       /* we can read PMSIDR and */
+       mrs_s   x1, SYS_PMSIDR_EL1
+       and     x1, x1,  #PMSIDR_EL1_FDS
+       /* if FEAT_SPE_FDS is implemented, */
+       cbz     x1, .Lskip_spefds_\@
+       /* disable traps of PMSDSFR to EL2. */
+       orr     x0, x0, #HDFGRTR2_EL2_nPMSDSFR_EL1
+
+.Lskip_spefds_\@:
        msr_s   SYS_HDFGRTR2_EL2, x0
        msr_s   SYS_HDFGWTR2_EL2, x0
        msr_s   SYS_HFGRTR2_EL2, xzr