--- /dev/null
+From c1933008679586b20437280463110c967d66f865 Mon Sep 17 00:00:00 2001
+From: Christian Lachner <gladiac@gmail.com>
+Date: Mon, 3 Jan 2022 15:05:17 +0100
+Subject: ALSA: hda/realtek - Fix silent output on Gigabyte X570 Aorus Master after reboot from Windows
+
+From: Christian Lachner <gladiac@gmail.com>
+
+commit c1933008679586b20437280463110c967d66f865 upstream.
+
+This patch addresses an issue where after rebooting from Windows into Linux
+there would be no audio output.
+
+It turns out that the Realtek Audio driver on Windows changes some coeffs
+which are not being reset/reinitialized when rebooting the machine. As a
+result, there is no audio output until these coeffs are being reset to
+their initial state. This patch takes care of that by setting known-good
+(initial) values to the coeffs.
+
+We initially relied upon alc1220_fixup_clevo_p950() to fix some pins in the
+connection list. However, it also sets coef 0x7 which does not need to be
+touched. Furthermore, to prevent mixing device-specific quirks I introduced
+a new alc1220_fixup_gb_x570() which is heavily based on
+alc1220_fixup_clevo_p950() but does not set coeff 0x7 and fixes the coeffs
+that are actually needed instead.
+
+This new alc1220_fixup_gb_x570() is believed to also work for other boards,
+like the Gigabyte X570 Aorus Extreme and the newer Gigabyte Aorus X570S
+Master. However, as there is no way for me to test these I initially only
+enable this new behaviour for the mainboard I have which is the Gigabyte
+X570(non-S) Aorus Master.
+
+I tested this patch on the 5.15 branch as well as on master and it is
+working well for me.
+
+BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=205275
+Signed-off-by: Christian Lachner <gladiac@gmail.com>
+Fixes: 0d45e86d2267d ("ALSA: hda/realtek - Fix silent output on Gigabyte X570 Aorus Master")
+Cc: <stable@vger.kernel.org>
+Link: https://lore.kernel.org/r/20220103140517.30273-2-gladiac@gmail.com
+Signed-off-by: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ sound/pci/hda/patch_realtek.c | 30 +++++++++++++++++++++++++++++-
+ 1 file changed, 29 insertions(+), 1 deletion(-)
+
+--- a/sound/pci/hda/patch_realtek.c
++++ b/sound/pci/hda/patch_realtek.c
+@@ -1926,6 +1926,7 @@ enum {
+ ALC887_FIXUP_ASUS_BASS,
+ ALC887_FIXUP_BASS_CHMAP,
+ ALC1220_FIXUP_GB_DUAL_CODECS,
++ ALC1220_FIXUP_GB_X570,
+ ALC1220_FIXUP_CLEVO_P950,
+ ALC1220_FIXUP_CLEVO_PB51ED,
+ ALC1220_FIXUP_CLEVO_PB51ED_PINS,
+@@ -2115,6 +2116,29 @@ static void alc1220_fixup_gb_dual_codecs
+ }
+ }
+
++static void alc1220_fixup_gb_x570(struct hda_codec *codec,
++ const struct hda_fixup *fix,
++ int action)
++{
++ static const hda_nid_t conn1[] = { 0x0c };
++ static const struct coef_fw gb_x570_coefs[] = {
++ WRITE_COEF(0x1a, 0x01c1),
++ WRITE_COEF(0x1b, 0x0202),
++ WRITE_COEF(0x43, 0x3005),
++ {}
++ };
++
++ switch (action) {
++ case HDA_FIXUP_ACT_PRE_PROBE:
++ snd_hda_override_conn_list(codec, 0x14, ARRAY_SIZE(conn1), conn1);
++ snd_hda_override_conn_list(codec, 0x1b, ARRAY_SIZE(conn1), conn1);
++ break;
++ case HDA_FIXUP_ACT_INIT:
++ alc_process_coef_fw(codec, gb_x570_coefs);
++ break;
++ }
++}
++
+ static void alc1220_fixup_clevo_p950(struct hda_codec *codec,
+ const struct hda_fixup *fix,
+ int action)
+@@ -2417,6 +2441,10 @@ static const struct hda_fixup alc882_fix
+ .type = HDA_FIXUP_FUNC,
+ .v.func = alc1220_fixup_gb_dual_codecs,
+ },
++ [ALC1220_FIXUP_GB_X570] = {
++ .type = HDA_FIXUP_FUNC,
++ .v.func = alc1220_fixup_gb_x570,
++ },
+ [ALC1220_FIXUP_CLEVO_P950] = {
+ .type = HDA_FIXUP_FUNC,
+ .v.func = alc1220_fixup_clevo_p950,
+@@ -2519,7 +2547,7 @@ static const struct snd_pci_quirk alc882
+ SND_PCI_QUIRK(0x13fe, 0x1009, "Advantech MIT-W101", ALC886_FIXUP_EAPD),
+ SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3/Z87X-UD3H", ALC889_FIXUP_FRONT_HP_NO_PRESENCE),
+ SND_PCI_QUIRK(0x1458, 0xa0b8, "Gigabyte AZ370-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS),
+- SND_PCI_QUIRK(0x1458, 0xa0cd, "Gigabyte X570 Aorus Master", ALC1220_FIXUP_CLEVO_P950),
++ SND_PCI_QUIRK(0x1458, 0xa0cd, "Gigabyte X570 Aorus Master", ALC1220_FIXUP_GB_X570),
+ SND_PCI_QUIRK(0x1458, 0xa0ce, "Gigabyte X570 Aorus Xtreme", ALC1220_FIXUP_CLEVO_P950),
+ SND_PCI_QUIRK(0x1462, 0x11f7, "MSI-GE63", ALC1220_FIXUP_CLEVO_P950),
+ SND_PCI_QUIRK(0x1462, 0x1228, "MSI-GP63", ALC1220_FIXUP_CLEVO_P950),
--- /dev/null
+From 9fb12fe5b93b94b9e607509ba461e17f4cc6a264 Mon Sep 17 00:00:00 2001
+From: Wei Wang <wei.w.wang@intel.com>
+Date: Fri, 17 Dec 2021 07:49:34 -0500
+Subject: KVM: x86: remove PMU FIXED_CTR3 from msrs_to_save_all
+
+From: Wei Wang <wei.w.wang@intel.com>
+
+commit 9fb12fe5b93b94b9e607509ba461e17f4cc6a264 upstream.
+
+The fixed counter 3 is used for the Topdown metrics, which hasn't been
+enabled for KVM guests. Userspace accessing to it will fail as it's not
+included in get_fixed_pmc(). This breaks KVM selftests on ICX+ machines,
+which have this counter.
+
+To reproduce it on ICX+ machines, ./state_test reports:
+==== Test Assertion Failure ====
+lib/x86_64/processor.c:1078: r == nmsrs
+pid=4564 tid=4564 - Argument list too long
+1 0x000000000040b1b9: vcpu_save_state at processor.c:1077
+2 0x0000000000402478: main at state_test.c:209 (discriminator 6)
+3 0x00007fbe21ed5f92: ?? ??:0
+4 0x000000000040264d: _start at ??:?
+ Unexpected result from KVM_GET_MSRS, r: 17 (failed MSR was 0x30c)
+
+With this patch, it works well.
+
+Signed-off-by: Wei Wang <wei.w.wang@intel.com>
+Message-Id: <20211217124934.32893-1-wei.w.wang@intel.com>
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+Fixes: e2ada66ec418 ("kvm: x86: Add Intel PMU MSRs to msrs_to_save[]")
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kvm/x86.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/x86/kvm/x86.c
++++ b/arch/x86/kvm/x86.c
+@@ -1218,7 +1218,7 @@ static const u32 msrs_to_save_all[] = {
+ MSR_IA32_UMWAIT_CONTROL,
+
+ MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
+- MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
++ MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
+ MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
+ MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
+ MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,