]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
clk: sophgo: Fix return values of register updating helpers
authorYao Zi <ziyao@disroot.org>
Fri, 7 Mar 2025 17:11:45 +0000 (17:11 +0000)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Tue, 25 Mar 2025 04:13:42 +0000 (12:13 +0800)
These helpers wrongly return the updated register value. As a non-zero
value indicates failure, this causes various clock operations are
considered failed.

Correct the return value to constant zero, since these simple MMIO
operations won't fail. This fixes clock enabling failures during booting
process,

In:    serial@4140000
Out:   serial@4140000
Err:   serial@4140000
Net:   Enable clock-controller@3002000 failed
failed to enable clock 0
No ethernet found.

which leads to misoperation of various peripherals.

Fixes: 5f364e072e7 ("clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC")
Tested-by: Yuguo Pei <purofle@gmail.com>
Signed-off-by: Yao Zi <ziyao@disroot.org>
drivers/clk/sophgo/clk-common.h

index 95b82e968d04aefbe586b58a7cce8c682d164026..a9e83d0d6899c44b52ec694797902591bbfb7e4d 100644 (file)
@@ -45,12 +45,14 @@ static inline u32 cv1800b_clk_getbit(void *base, struct cv1800b_clk_regbit *bit)
 
 static inline u32 cv1800b_clk_setbit(void *base, struct cv1800b_clk_regbit *bit)
 {
-       return setbits_le32(base + bit->offset, BIT(bit->shift));
+       setbits_le32(base + bit->offset, BIT(bit->shift));
+       return 0;
 }
 
 static inline u32 cv1800b_clk_clrbit(void *base, struct cv1800b_clk_regbit *bit)
 {
-       return clrbits_le32(base + bit->offset, BIT(bit->shift));
+       clrbits_le32(base + bit->offset, BIT(bit->shift));
+       return 0;
 }
 
 static inline u32 cv1800b_clk_getfield(void *base,