]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net: phy: aquantia: call aqr_gen2_fill_interface_modes() for AQCS109
authorVladimir Oltean <vladimir.oltean@nxp.com>
Thu, 21 Aug 2025 15:20:17 +0000 (18:20 +0300)
committerJakub Kicinski <kuba@kernel.org>
Mon, 25 Aug 2025 17:54:15 +0000 (10:54 -0700)
I don't have documentation or hardware to test, but according to commit
99c864667c9f ("net: phy: aquantia: add support for AQCS109"), "From
software point of view, it should be almost equivalent to AQR107."

I am relatively confident that the GLOBAL_CFG registers read by
aqr_gen2_fill_interface_modes() are supported, because
aqr_gen2_read_status(), currently used by AQCS109, also reads them, and
I'm unaware of any reported problem.

The change is necessary because a future patch will introduce a
requirement for all aqr_gen2_read_status() callers to have previously
called aqr_gen2_read_global_syscfg(). This is done through
aqr_gen2_fill_interface_modes().

Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://patch.msgid.link/20250821152022.1065237-11-vladimir.oltean@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/phy/aquantia/aquantia_main.c

index e3a18fc1b52ae6c72887b6a4369c47f4259d4107..a7b1862e8a26f8c59d5f33ef0971c981175a424b 100644 (file)
@@ -899,7 +899,11 @@ static int aqcs109_config_init(struct phy_device *phydev)
        if (!ret)
                aqr107_chip_info(phydev);
 
-       return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
+       ret = aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
+       if (ret)
+               return ret;
+
+       return aqr_gen2_fill_interface_modes(phydev);
 }
 
 static void aqr107_link_change_notify(struct phy_device *phydev)