]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: x1e78100-t14s: enable SDX62 modem
authorJohan Hovold <johan+linaro@kernel.org>
Thu, 27 Mar 2025 08:14:27 +0000 (09:14 +0100)
committerBjorn Andersson <andersson@kernel.org>
Fri, 16 May 2025 20:43:44 +0000 (21:43 +0100)
Enable PCIe5 and the SDX62 modem present on some T14s.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250327081427.19693-1-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi

index 88cbf2a8186188acbc29baed13169fb940f83c73..14ddf4fc7693a8f9a8bf9d657c3a377741b21217 100644 (file)
                regulator-boot-on;
        };
 
+       vreg_wwan: regulator-wwan {
+               compatible = "regulator-fixed";
+
+               regulator-name = "VCC3B_WAN_RCM";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-0 = <&wwan_sw_en>;
+               pinctrl-names = "default";
+
+               regulator-boot-on;
+       };
+
        sound {
                compatible = "qcom,x1e80100-sndcard";
                model = "X1E80100-LENOVO-Thinkpad-T14s";
        status = "okay";
 };
 
+&pcie5 {
+       perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+
+       vddpe-3v3-supply = <&vreg_wwan>;
+
+       pinctrl-0 = <&pcie5_default>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&pcie5_phy {
+       vdda-phy-supply = <&vreg_l3i_0p8>;
+       vdda-pll-supply = <&vreg_l3e_1p2>;
+
+       status = "okay";
+};
+
 &pcie6a {
        perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
        wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
                };
        };
 
+       pcie5_default: pcie5-default-state {
+               clkreq-n-pins {
+                       pins = "gpio150";
+                       function = "pcie5_clk";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+
+               perst-n-pins {
+                       pins = "gpio149";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-disable;
+               };
+
+               wake-n-pins {
+                       pins = "gpio151";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
        pcie6a_default: pcie6a-default-state {
                clkreq-n-pins {
                        pins = "gpio153";
                bias-disable;
                output-low;
        };
+
+       wwan_sw_en: wwan-sw-en-state {
+               pins = "gpio221";
+               function = "gpio";
+               drive-strength = <4>;
+               bias-disable;
+       };
 };
 
 &usb_1_ss0_hsphy {