]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
.27 patch actually added.
authorGreg Kroah-Hartman <gregkh@suse.de>
Wed, 27 May 2009 21:59:21 +0000 (14:59 -0700)
committerGreg Kroah-Hartman <gregkh@suse.de>
Wed, 27 May 2009 21:59:21 +0000 (14:59 -0700)
queue-2.6.27/x86-work-around-fedora-11-x86-32-kernel-failures-on-intel-atom-cpus.patch [new file with mode: 0644]

diff --git a/queue-2.6.27/x86-work-around-fedora-11-x86-32-kernel-failures-on-intel-atom-cpus.patch b/queue-2.6.27/x86-work-around-fedora-11-x86-32-kernel-failures-on-intel-atom-cpus.patch
new file mode 100644 (file)
index 0000000..388f6c9
--- /dev/null
@@ -0,0 +1,51 @@
+From stable-bounces@linux.kernel.org  Wed May 27 14:53:51 2009
+From: Ingo Molnar <mingo@elte.hu>
+Date: Fri, 22 May 2009 16:30:39 -0400
+Subject: x86: work around Fedora-11 x86-32 kernel failures on Intel Atom CPUs
+To: stable@kernel.org
+Message-ID: <20090522163039.587176f0@dhcp-100-2-144.bos.redhat.com>
+
+
+From: Ingo Molnar <mingo@elte.hu>
+commit 211b3d03c7400f48a781977a50104c9d12f4e229 upstream
+
+[Trivial backport to 2.6.27 by cebbert@redhat.com]
+
+x86: work around Fedora-11 x86-32 kernel failures on Intel Atom CPUs
+
+Impact: work around boot crash
+
+Work around Intel Atom erratum AAH41 (probabilistically) - it's triggering
+in the field.
+
+Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
+Tested-by: Kyle McMartin <kyle@redhat.com>
+Signed-off-by: Ingo Molnar <mingo@elte.hu>
+Cc: <cebbert@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+---
+
+---
+ arch/x86/mm/pageattr.c |   11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/arch/x86/mm/pageattr.c
++++ b/arch/x86/mm/pageattr.c
+@@ -565,6 +565,17 @@ static int split_large_page(pte_t *kpte,
+       ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
+       pgprot_val(ref_prot) |= _PAGE_PRESENT;
+       __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
++
++      /*
++       * Intel Atom errata AAH41 workaround.
++       *
++       * The real fix should be in hw or in a microcode update, but
++       * we also probabilistically try to reduce the window of having
++       * a large TLB mixed with 4K TLBs while instruction fetches are
++       * going on.
++       */
++      __flush_tlb_all();
++
+       base = NULL;
+ out_unlock: