drm: renesas: rz-du: mipi_dsi: Simplify HSFREQ calculation

Simplify the high-speed clock frequency (HSFREQ) calculation by removing
the redundant multiplication and division by 8. The updated equation:

    hsfreq = mode->clock * bpp / dsi->lanes;

produces the same result while improving readability and clarity.

Additionally, update the comment to clarify the relationship between HS
clock bit frequency, HS byte clock frequency, and HSFREQ.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250609225630.502888-3-prabhakar.mahadev-lad.rj@bp.renesas.com

diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
index 70f36258db634477f8cf9d9b006f7f5d61d77232..7fa5bb2a62b64c77b7d1c2157c4edbdcf08c65f2 100644 (file)
--- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
+++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
@@ -288,10 +288,10 @@ static int rzg2l_mipi_dsi_startup(struct rzg2l_mipi_dsi *dsi,
         *       hsclk: DSI HS Byte clock frequency (Hz)
         *       lanes: number of data lanes
         *
-        * hsclk(bit) = hsclk(byte) * 8
+        * hsclk(bit) = hsclk(byte) * 8 = hsfreq
         */
        bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
-       hsfreq = (mode->clock * bpp * 8) / (8 * dsi->lanes);
+       hsfreq = mode->clock * bpp / dsi->lanes;
 
        ret = pm_runtime_resume_and_get(dsi->dev);
        if (ret < 0)