]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/pci-host/designware: Fix ATU_UPPER_TARGET register access
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 31 Mar 2025 14:46:13 +0000 (16:46 +0200)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 31 Mar 2025 19:32:43 +0000 (21:32 +0200)
Fix copy/paste error writing to the ATU_UPPER_TARGET
register, we want to update the upper 32 bits.

Cc: qemu-stable@nongnu.org
Reported-by: Joey <jeundery@gmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2861
Fixes: d64e5eabc4c ("pci: Add support for Designware IP block")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-Id: <20250331152041.74533-2-philmd@linaro.org>

hw/pci-host/designware.c

index c07740bfaa455994357325bb12306db6204b9cad..5598d18f478f463d98db53f7f2cb43111fb67ebd 100644 (file)
@@ -371,7 +371,7 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address,
 
     case DESIGNWARE_PCIE_ATU_UPPER_TARGET:
         viewport->target &= 0x00000000FFFFFFFFULL;
-        viewport->target |= val;
+        viewport->target |= (uint64_t)val << 32;
         break;
 
     case DESIGNWARE_PCIE_ATU_LIMIT: