mips: bmips: enable RAC on BMIPS4350

The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[ rework code and reduce code duplication ]
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index a4f84667a9019661621bee12c93e1317f44f20f1..35b8d810833cc1589f02ee6cc5c8b8a18d53c7ee 100644 (file)
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -592,6 +592,7 @@ asmlinkage void __weak plat_wired_tlb_setup(void)
 void bmips_cpu_setup(void)
 {
        void __iomem __maybe_unused *cbr = bmips_cbr_addr;
+       u32 __maybe_unused rac_addr;
        u32 __maybe_unused cfg;
 
        switch (current_cpu_type()) {
@@ -620,6 +621,23 @@ void bmips_cpu_setup(void)
                __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
                break;
 
+       case CPU_BMIPS4350:
+               rac_addr = BMIPS_RAC_CONFIG_1;
+
+               if (!(read_c0_brcm_cmt_local() & (1 << 31)))
+                       rac_addr = BMIPS_RAC_CONFIG;
+
+               /* Enable data RAC */
+               cfg = __raw_readl(cbr + rac_addr);
+               __raw_writel(cfg | 0xf, cbr + rac_addr);
+               __raw_readl(cbr + rac_addr);
+
+               /* Flush stale data out of the readahead cache */
+               cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
+               __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
+               __raw_readl(cbr + BMIPS_RAC_CONFIG);
+               break;
+
        case CPU_BMIPS4380:
                /* CBG workaround for early BMIPS4380 CPUs */
                switch (read_c0_prid()) {